The world of High Performance Computing is dynamic and constantly evolving. As new products are introduced by various companies the performance bar continues to climb. Every six months the TOP500 project re-compiles a list of the top 500 most powerful computer systems. They pose a fascinating question here on
www.top500.org: "Did you know that a small cluster today (less than 1/2 rack) would top the Top500 list from just ten years ago?"
High Performance Computing can be defined as the combination of high performance computers with high performance networks. Hence, a large part of the HPC story comes from the underlying networking infrastructure; the network backbone and interconnect fabrics, that tie the independent computing resources together. AMD partners like Mellanox, Myricom, and others create these network technologies. This infrastructure in turn is leveraged by application-facing software middleware such as Platform's MPI and LSF that support the programming and scheduling of HPC applications on top of this infrastructure.
AMD's core contribution to HPC comes from the AMD Opteron ™ processor which integrates multiple x86-64 cores with a router and memory controller. Using a HyperTransport ™ -based processor interface, Opteron-based systems more effectively match the requirements of high performance networks when computing on, and moving, large sets of data, than traditional front-side bus-based systems. Since its introduction in 2003 the original Opteron's peak capability of 2 DFLOPs/cycle and easy integration of the AMD64 instruction set allowed a compelling advantage in commodity-priced HPC clusters, an excellent combination of low-cost, floating point performance, and power efficiency. The launch of Dual-Core AMD Opteron in 2005 meant roughly a doubling of peak performance. The introduction of Third-Generation AMD Opteron again raises the bar, with peak capability now raised to 4 DFLOPS/cycle per core. Combined with Quad-Core, this represents up to four times the floating-point computations of previous AMD Opteron processors.
AMD's end customers such as Hewlett-Packard, IBM, Sun, Dell, Appro, Rackable and others are the key agents that deliver the Opteron to HPC consumers in their computing solutions. Both rack-mounted servers and blade-based servers are common, and the number of processor sockets can be based on 1, 2, 4, and even up to 8 sockets.
HPC is a vast arena with many different applications and workloads. The use of distributed computing techniques is valuable for enabling the cost-effective x86-based AMD platform. Many scientific and commercial workloads use technologies such as MPI to excellent effectiveness to enable distributed computing. The invasion of multi-core x86 processors into the HPC market, starting in 2005 with Dual-Core AMD Opteron and Athlon processors from AMD continues with commonly available Quad-Core AMD Opteron and AMD Phenom processors in 2008. The doubling of core-counts and micro-architectural enhancements on AMD Family 10h processors means potentially a 4x increase in computing power compared to Dual-Core AMD processors from AMD Family 0Fh.
The commonality of what developers need to understand in HPC consists typically of how to use and deploy compilers, math and performance libraries, and distributed computing technologies such as MPI. We've seen here how to get some practical hands-on experience with High Performance Computing on AMD platforms. We've seen how to use ACML (the AMD Core Math Library) and the GCC compiler in an effective way, including other software solutions such as OpenMPI and MPICH2. Workloads such as High Performance Linpack and Parallel Ocean Program provide a great way to get started with all these software tools and understand performance in HPC on AMD platforms.
This HPC Zone focuses on software development issues that influence HPC application performance on AMD's new core technology, Third-Generation AMD Opteron. An examination of some example HPC workloads is presented, along with how they are affected by math libraries and compilers. The examples are demonstrated on single-node, multiple processor, multiple core, AMD processor-based systems so that the individual developer can try them on a standalone machine. Along the way we'll describe some tips, tricks, and stumbles a programmer may encounter when developing HPC code.
Get started by reading through the HPC Concepts in the table of contents, then dive into the Hands On Exercises.