APML (Advanced Platform Management Link) is an out-of-band power management and RAS (Reliability, Availability and Serviceability) AMD processor feature. APML was first made available on AMD “Istanbul” server processors, which were launched in mid-2009. Examples of APML out-of-band capabilities:
- Processor power capping
- Processor asset identification and tracking (including CPUID)
- Machine check register access with optional alerts to management subsystems
In order to help developers take full advantage of this feature, AMD provides a Firmware Design Kit (FDK) and a BIOS tool that together enable you to get the most out of your processor’s performance and gain a competitive edge.
APML Architecture Overview
APML is an SMBus v2.0 compatible 2-wire processor slave interface which supports 100 KHz, 400 KHz and 3.4 MHz clock speeds and optional SMBus alerts. Platform management controllers (typically Baseboard Management Controllers and Service Processors) may master the APML interface to read and write limited processor state to perform power management and RAS operations.
Tools for Management Controller Firmware Developers – APML FDK
In order to help developers take full advantage of APML, AMD provides an APML FDK (Firmware Development Kit) management controller reference implementation under a BSD-like license.
APML FDK design characteristics:
- Standard C code base for maximum portability
- Single threaded model to support a wide variety of management subsystem operating systems
- Clear separation and well defined interfaces to hardware dependant code
- Simple and powerful high level interfaces, for example:
- apml_read_cpuid() – Obtain processor capabilities and identification information
- apml_read_pstate() – Read the current P-state for a given core in the processor
- apml_write_pstate_limit() – Place a power cap on the processor
Tools for BIOS Developers – ACPI P-state Notification
APML provides a powerful performance and power capping feature called P-state Limit. This enables a management controller to place a P-state Limit on the processor which is a ceiling on the amount of performance and power that a processor may utilize.
In order for an operating system to schedule work properly and perform power management, it must understand the current processor operating conditions including any existing P-state Limits. ACPI (Advanced Configuration and Power Interface) provides a mechanism to alert the operating system to these kinds of out-of-band events.
AMD highly recommends that any platform which implements P-state Limits should also implement an ACPI notification mechanism. Please see the ACPI Notification white paper, “Using ACPI to Report APML P-State Limit Changes to Operating Systems and VMM’s,” for details.
- APML (Advanced Platform Management Link) Specification
- System Management Bus (SMBus) 2.0 Specification: http://smbus.org/specs/
- Advanced Configuration & Power Interface Specification: http://www.acpi.info/
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