Do more. Do it quickly and efficiently. Those are the mantras of today's hardware and software developers alike. Today software developers are benefiting from improved multiple-core and multiple-processor architectures backed by various other technologies to make the most of each process. But what's in store for tomorrow?
AMD, which is differentiating itself in the market with its multi-core x86 architecture, is working on two quad-core processors previously code-named Deerhound and Greyhound. The two chips are expected to show up in the marketplace as early as mid-2007. The new x86-based products are expected to include a quad-core design for servers, workstations and high-end desktops, and a dual-core design intended for mainstream desktop markets.
Greyhound, which is AMD's next Opteron server chip, is expected to have the following stats:
- Quad-core
- Socket F(1207) footprint
- Shared level-three cache
- Dual-channel registered DDR2 memory controller
This processor is projected for release in mid-2007.
Deerhound, which is AMD's desktop Athlon version, is also expected to share several of the same qualities as its Opteron cousin:
- Quad-core
- Shared level-three cache
- DDR2/3 memory controller
- HyperTransport 3 interface
The processor will require a new infrastructure to support its feature set, and is projected for release in early 2008.
In addition, AMD is bringing a new socket configuration to the market that allows for third-party semiconductor manufacturers to put their specialized chips side by side Opteron, which the company is calling "Torrenza."
The process is the first open, customer-centric x86 innovation platform, capitalizing on the Direct Connect Architecture and HyperTransport advantages of the AMD64 architecture to enable other processor and hardware providers to innovate within a common ecosystem. AMD's initial hardware partners include IBM, Cray, Hewlett-Packard, and Sun Microsystems.
Already, AMD is setting its self apart in the marketplace with improved memory and caching performance. But for software development, Torrenza means that you can start coding your applications right into the processor to handle specific workloads such as AJAX (Asynchronous JavaScript and XML).
"Torrenza" will enable a global innovation community to develop and deploy application-specific co-processors to work alongside AMD processors in multi-socket systems.
Up to 32-way Additional AMD infrastructure and architectural improvements promise to enable efficient, multi-multi-processor boxes common in server and desktop environments. Hardware improvement leaps aside, the processor market has become a game of incremental and exponential increases in processor numbers and cores.
What does this mean for software developers? It means that having more than enough horsepower to run lengthy, complex tasks is right around the corner. It also means that developers should be changing the way they think about multi-thread and multi-core coding.
Instead of programming for today's architecture—dual-core processors and dual-processor machines—coders should be writing more dynamic code, code capable of spawning as many threads/processes as possible on the architecture on which it is run. A year or two from now, when the code is run on a piping-hot 24-way Deerhound computer, the same code can make the most of its new home.
Freelance consultant Steve Schafer has written multiple books and articles on technology. In the business world, he most recently worked as COO/CFO of Progeny Linux Systems in Indianapolis. Serving as president and CEO in the company's startup years, Steve led Progeny's business and financial turnaround during the tech crash of the early 2000s. Prior to joining Progeny, he was a senior title manager for Macmillan Digital USA, overseeing the operating system and entertainment software products--tripling Macmillan's Linux product line revenue. He then partnered Macmillan with Mandrake, bringing Mandrake's Linux distribution to the competitive retail market.
Revised: 14-Mar-2008