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AMD “Light-Weight Profiling” Proposal
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Overview
AMD "Light-Weight Profiling" (LWP) is the first specification under AMD's Hardware Extensions for Software Parallelism initiative. This initiative will encompass a broad set of innovations designed to improve software parallelism, and thus application performance, through new hardware features in future versions of AMD processors. LWP is a technology designed to increase the performance of software applications by providing a mechanism that allows software to more effectively leverage the benefits of multi-core processing. It is a CPU mechanism that could have broad benefit to software including, but not limited to, runtime environments such as Sun Microsystems' Java Virtual Machine and Microsoft's .NET Framework.

LWP is designed to enable code to make dynamic and real-time decisions about how best to improve the performance of concurrently running tasks, using techniques such as memory organization and code layout, with very little overhead. These capabilities are particularly beneficial to runtime environments like Java and .NET, which can run multiple threads and are used to develop an increasingly large percentage of applications.

 

Documentation

The LWP extension is currently in proposal stage. AMD is committed to providing technologies that meet software development needs, and is therefore soliciting community input to help refine the LWP specification.

The latest revision of this document (v3.02) contains updates that are a direct result of community feedback. Thanks to everyone who has contributed their ideas to help make this specification even more useful.

Additions:

  • New event types, including events for core clock cycles and reference clock cycles
  • A programmed event that the running program can insert into the event ring buffer with the (new) LWPINS instruction
  • Event filtering by IP range to allow capturing events only within (or not within) a particular range
  • Filtering of branch events by whether the branch was predicted correctly or not

Changes:

  • The CoreId value is programmable in a new MSR, to support virtualization
  • The layout of the LWPCB has been modified to allow for future expansion

Please send your feedback, comments, and suggestions to LWP.Feedback@amd.com.

  • » View the specification