Overview

AMD Lightweight Profiling (LWP) is the first specification under AMD's Hardware Extensions for Software Parallelism initiative. This initiative will encompass a broad set of innovations designed to improve software parallelism, and thus application performance, through new hardware features in future versions of AMD processors.

LWP is a technology designed to increase the performance of software applications by providing a mechanism that improves the ability of software to leverage the benefits of multi-core processing. LWP could have broad benefits to software including, but not limited to, runtime environments such as Sun Microsystems' Java Virtual Machine and Microsoft's .NET Framework.

With very little overhead, LWP provides profiling information that enables code to make dynamic decisions about how to improve the performance of running tasks. Software can use this information to reorganize data and code layout or to optimize frequently executed routines. These capabilities are particularly beneficial to runtime environments like Java and .NET, which can run multiple threads and are used to develop an increasingly large percentage of applications.

Documentation

AMD is committed to providing technologies that meet software development needs. The original LWP proposal was posted here in 2007 along with a request for input from the software community.

The latest revision of this document (v3.03) is a specification containing updates that are a direct result of community feedback. Thanks to everyone who has contributed ideas to help make Lightweight Profiling even more useful.

Additions:

• New event types, including events for core clock cycles and reference clock cycles
• A programmed event that the running program can insert into the event ring buffer with the (new) LWPINS instruction
• Event filtering by IP range to allow capturing events only within (or not within) a particular range
• Filtering of branch events by a variety of conditions
• LWP instruction encodings
• XSAVE and XRSTOR details and XFEATURE_ENABLED_MASK support
• Guidelines for operating system and hypervisor developers

Changes:

• The CoreId value is programmable in a new MSR, to support virtualization
• The layout of the LWPCB has been modified to allow for future expansion

Please send your feedback, comments, and suggestions to LWP.Feedback@amd.com.